Eridu India Private Limited, a wholly owned subsidiary of Eridu Corporation, Saratoga, California, USA, is looking to hire highly motivated and talented professionals for its R&D center in Bengaluru to join our world-class team.

Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI. Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.

The company’s solutions and value proposition have been widely validated by leading hyperscalers.

Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.

Visit our website eridu.ai to learn more.

Position Overview

We are seeking an RTL Engineer to help define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices.

The candidate will be part of Design Group responsible for defining, specifying, architecting, executing and productizing leading-edge Networking devices. 

Responsibilities

• Collaborate with Chip and System Architects to translate architecture requirements into microarchitecture and design integration of the Ethernet IO subsystem, including MAC, PCS, and SerDes.

• Perform RTL coding, conduct code reviews, and debug designs.

• Work with third-party vendors to procure and integrate the Ethernet block with MAC, PCS, and PHY.

• Partner with Verification Engineers to define the test plan, execute verification, and understand both serial and parallel mode VIP behavior.

• Debug the full Ethernet protocol stack.

• Engage in post-silicon activities such as bring-up, platform validation, characterization, parameter optimization, and final productization.

• Support the definition of development flows that improve execution efficiency and quality.

• Collaborate closely with Physical Design, Firmware, and Design Verification teams to ensure successful end-to-end RTL implementation.

Qualifications

• Master’s degree in Electrical Engineering (MSEE) with 8-15 years of experience.

• Proven record of successful tape-outs and productization, preferably in networking devices.

• Strong understanding of the Ethernet 802.3 protocol, including framing, encoding, and broadcasting/unicasting; familiarity with Ultra Ethernet developments is preferred.

• Solid knowledge of SerDes fundamentals, including clocking, Decision Feedback Equalization (DFE), CTLE, and initialization.

• Comprehensive understanding of multiple clock, reset, and power domain design challenges with safe/robust design practices.

• Experience in refactoring and restructuring designs to address timing and area challenges, including algorithmic and structural design changes.

• Ability to optimize hardware versus firmware implementations for overall product performance and efficiency.

• Excellent knowledge of industry-standard tools and best-in-class practices for high-quality design.

• Prior experience with source synchronous design implementation.

• Essential knowledge of Ethernet architectures and Layer 2, Layer 3, and Layer 4 networking protocols.

• Prior experience in integrating a MAC IP with PCS and SerDes PHY, preferably at 100G or higher.

At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.