JobTarget Logo

Member of Technical Staff, Reliability Engineer in Redmond, Washington at Lumotive

NewSalary: $90000 - $105000Job Function: Engineering
Lumotive
Redmond, Washington, 98052, United States
Posted on
New job! Apply early to increase your chances of getting hired.

Explore Related Opportunities

Job Description

Member of Technical Staff, Reliability Engineer

Lumotive is pioneering the era of programmable opticswhere light is controlled as intelligently and flexibly as software.
At the heart of this transformation is a once-in-a-generation innovation: a flat CMOS-based general purpose optic. Lumotives Light Control Metasurface (LCM) beam forming chips can be programmed to function as a beam steering mirror, a lens, mirror, a beam splitteror any optical functionreplacing bulky and mechanical optical components with a fully digital, reconfigurable semiconductor . This breakthrough lays the foundation for a massive shift in multiple technologiesfrom 3D sensing and imaging to optical networking, free space optical communication, and beyond. Like the shift from analog to digital in electronics, programmable optics will reshape industries from robotics, self-driving cars, AI, defense, and healthcare.

Lumotives first commercial application is in LiDAR, where its software-defined beam steering chips are already enabling compact, high-performance, solid-state sensors. These sensors are being deployed today in smart infrastructure, robotics, and mobility systems through leading module makers and solution integrators.

With more than 200 patents and growing commercial traction, Lumotive is delivering the worlds first digital platform for lightand redefining whats possible in the optical age.

Job Description:

We are looking for a reliability engineer to own the reliability of the LCM itself — the chip at the core of everything Lumotive ships. The LCM is a new class of semiconductor device combining a CMOS backplane, novel thin-film material stacks, and liquid crystal, and it can fail in ways that go beyond the standard CMOS reliability playbook. This is not a turn-the-crank qualification role: some failure modes are unfamiliar, the acceleration models often have to be built from data we generate ourselves, and the person in this seat is expected to develop a deep, first-principles understanding of how and why LCMs fail.

You will design and run accelerated stress tests, perform hands-on failure analysis, build lifetime models, and correlate reliability outcomes back to wafer fab process splits, materials, and assembly. Just as importantly, you will look ahead for failure modes we have not characterized yet — anticipating how a new device in new use conditions can behave — so the team understands the risks early. Your findings will directly drive process, design, and materials decisions and help accelerate our ramp to high-volume production.

Responsibilities:
  • Own core LCM reliability at the chip level: define the stress test strategy, execute it, and be the authority on LCM failure modes, mechanisms, and lifetime
  • Design and run accelerated life tests (HTOL, high temperature storage, temperature cycling, humidity / biased-humidity, optical exposure) and define new stress conditions that surface latent failure modes early
  • Perform hands-on failure analysis: optical and electrical inspection, defect tracking and precursor identification, root-cause hypothesis generation and testing
  • Build statistical lifetime models (time-to-failure distributions, acceleration factors, activation energies) to project reliability from accelerated conditions to customer use conditions
  • Correlate reliability outcomes with wafer fab process splits, materials experiments, and assembly variables; drive design-of-experiments with process and fab partners to improve intrinsic reliability
  • Define pass / fail criteria, burn-in, and screening strategies to keep early failures out of customer deliveries
  • Develop and maintain the analysis tooling (Python, test databases, dashboards) that turns raw stress-test data into conclusions
  • Communicate findings rapidly and clearly: document every study in our knowledge base with conclusions and next steps, present at reliability reviews, and flag new failure modes to the broader team the day you find them
Qualifications:
  • Bachelor’s degree in electrical engineering, physics, materials science, or related fields is required. A Master’s or PhD is preferred.
  • Minimum of 5 years of experience in semiconductor or optoelectronic device reliability, failure analysis, or closely related roles is required.
  • Hands-on experience designing and executing accelerated stress tests (e.g., HTOL, temperature cycling, humidity / HAST, high temperature storage).
  • Hands-on failure analysis experience: optical microscopy, electrical characterization, and systematic root-cause investigation.
  • Statistical reliability analysis skills: time-to-failure distributions (e.g., Weibull), acceleration modeling (e.g., Arrhenius), and lifetime projection.
  • Demonstrated experience characterizing failure modes that fall outside standard textbook models — working them from first principles rather than relying solely on established qual flows.
  • Proficiency in Python, JMP, or similar for data analysis of large reliability datasets.
  • Strong written and verbal communication skills; disciplined about documenting work with clear conclusions and next steps.
  • Intellectual curiosity and ownership: you think about what can fail constantly, and you dig until you understand why.
  • Background in liquid crystal devices (LCoS, displays), MEMS, image sensors, photonics, or other emerging semiconductor device technologies.
  • Familiarity with reliability and quality standards (JEDEC, AEC-Q100) and how to adapt them to devices they were not written for.
  • Experience running split-lot design-of-experiments with wafer fabs or materials vendors to improve reliability.
  • Experience defining burn-in and production screening for early-failure elimination.
  • Experience with test data infrastructure: databases, Tableau or similar dashboards, Git and software development best practices.
Benefits include but not limited to:

Health, dental and vision
FSA, HSA
PTO plus 14 paid company holidays
401K with 3% contribution
Stock Options
Life insurance and disability

$90,000 - $105,000 a year

Job Location

Redmond, Washington, 98052, United States

Frequently asked questions about this position

Similar Jobs In Redmond, Washington

Optical Test Engineer

Rivet Industries, Inc.
Bellevue, Washington

Reliability Engineer

Rivet Industries, Inc.
Bellevue, Washington

Senior Machine Learning Engineer

FieldAI
Seattle, Washington

Senior Automation Controls Engineer

Blue Origin
Arlington, Washington
Continue to apply
Enter your email to continue. You’ll be redirected to the employer’s application.
By clicking Continue, you understand and agree to JobTarget's Terms of Use and Privacy Policy.