Senior Verification Engineer at Bolt Graphics – Sunnyvale, California

Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient graphics processors. We pride ourselves on our first principles approach to solving problems. We are energized by our mission to reduce the barrier of entry for content creation and consumption. Our goal is to enable everyone to easily create, simulate and consume immersive experiences as vividly as they can imagine them.

Our Values

• Be Fearless: Unmute yourself. Test boundaries and get proven right.
• Remain Adaptable: Stay comfortable in a continuously changing world. If you’re wrong, concede and move on.
• Educate Your Ego: Selflessly collaborate towards our shared purpose.

About the role:

We are seeking a highly skilled, self-starting Verification Engineer who is fluent in UVM, Formal Verification, and System Verilog. We value candidates who take initiative and are comfortable working independently with minimal supervision while delivering outstanding results.

What you'll do:

• Work in a System Verilog/UVM environment developing tests, testbenches, UVM components, and regressions/test lists.
• Develop formal verification procedure for complex silicon IP.
• Verify FPGA designs, including SOC architectures, design and implement test benches for both unit level and system level environments, and create reusable verification environments that can be used across multiple projects.
• Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix.
• Oversee verification contractors and junior verification engineers.
• Work in a fast-paced startup environment on a variety of products.
• Work collaboratively and in tandem with system architects, FPGA design engineers, and embedded software engineers across different timezones.
• Establish and maintain effective working relationships across departments.

Qualifications:

• BS or higher in Computer / Electrical / Software engineering or related field
• Experience with UVM
• Experience with Formal Verification
• Experience verifying System Verilog
• Experience with overseeing junior verification engineers
• Exposure to all stages of verification requirements collection, creation of verification methodology plans, test plans, testbench implementation, Testcases development, coverage closure, documentation and support
• Experience working at a startup and navigating ambiguity
• Experience with the Xilinx Alveo platform
• Experience with of IEEE 754
• Experience with the pre-and-post silicon lifecycle
• Experience with the Xilinx Versal platform
• Experience with Zebu emulation

Compensation Range: $130,000–$265,000 per year (California). This range represents the anticipated base pay for this role; the final offer may vary based on qualifications, experience, and location.

Benefits:

• Medical, Dental, & Vision - 100% covered premiums
• Equity - Stock Options
• 401(k) match
• WFH Hardware
• Generous Paid Time Off

Bolt is committed to building a diverse and inclusive environment in which we recognize and value each other’s differences as well as fostering a culture that promotes its core values: Professionalism, Integrity, and Respect. As an equal opportunity employer, all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, age, disability, or status as a protected veteran.